Field of the Invention
The present invention relates to a semiconductor device having a terminal structure in the outer periphery of a device region, and a production method therefor.
Background Art
In a vertical semiconductor device establishing electrical continuity in a direction perpendicular to the main surface of a substrate, a pn junction interface is exposed on a terminal part of the device. When a reverse voltage is applied to the semiconductor device, there is a problem that the breakdown voltage does not reach the design value because the electric field is concentrated at the pn interface exposed on the terminal surface. A terminal structure such as field plate structure and guard ring structure is generally formed in the outer periphery of the device region to improve the breakdown voltage.
Japanese Patent No. 5691259 discloses the structure in which recess grooves are formed on the terminal region of the p-type layer formed on the n-type layer, and a region of the thinned p-type layer (electric field relaxation region) is formed. In this structure, a depletion layer is formed at a pn junction between the electric field relaxation region and the n-type layer, and equipotential lines are uniformly distributed on the terminal side in the depletion layer, thereby relaxing the electric field concentration.
However, breakdown voltage is not sufficiently improved even in the structure of Japanese Patent No. 5691259, further improvement in the breakdown voltage was sought.